POLARIC · Printable, organic and large-area realisation of integrated circuits

The objective of the project is to realise high-performance organic electronic devices and circuits using large-area processing compatible fabrication methods. The high performance of the organic circuits referred to here means high speed (kHz-MHz range), low parasitic capacitance, low operating voltage, and low power consumption. The related organic thin film transistor (OTFT) fabrication development will be focused to enable a high resolution nanoimprinting lithography (NIL) step, which is compatible with roll-to-roll processing environment. Applying NIL will enable smaller transistor channel lengths (down below 1 µm) and thereby an increase in the speed of the device. Another important concept to improve the performance is the self-aligned fabrication principle, in which the critical patterns of the different OTFT layers are automatically aligned in respect to each other during the fabrication. This decreases the parasitic capacitances and thereby increases the speed of the device, and is one of the key elements to enable the use of large-area fabrication techniques such as printing. Also complementary transistor technology will be developed, which will enable a decrease in operating voltage and power consumption. The high performance organic transistors will be tested in basic electronic building blocks such as inverters and ring oscillators. The technology development will be exploited in the active matrix liquid crystal display (AMLCD) and radio-frequency identification (RFID) demonstrators. In addition to showing that sufficient performance can be reached without sacrificing the mass fabrication approach, solutions for the fabrication of roll-to-roll tools in order to make serial replication viable will be provided. Finally, the design, characterization, and modeling of submicron low-power OTFTs will be done in order to support the fabrication of the demonstrators based on the technology developed in the project.