MEMSPACK · Zero- and First-level Packaging of RF-MEMS

Future personal and ground RF communications systems and communications satellites necessitate the use of highly integrated RF front-ends, featuring small size, low weight, high performance and low cost. Off-chip, bulky passive RF components, like discrete PIN diode switches and ceramic filters, are limiting further chip scaling. MEMS technology is now rapidly emerging as an enabling technology to yield a new generation of high-performance RF-MEMS passives, like switches, high-Q resonators and tunable filters.Today, the commercialization of RF-MEMS, is greatly hampered by two critical success factors, namely, the development of an appropriate packaging technology and solving the reliability issues. There has not been sufficient effort towards solving these issues in Europe. The proposed MEMPACK project tackles the packaging issue. The project's objective is to (further) develop and to characterize generic wafer-level (or 0-level) and 1-level packaging solutions for housing a large variety of RF-MEMS. The project will address all relevant issues of the development chain, i.e., the design of the package (including RF design, thermomechanical design, design for reliability), the packaging technology (e.g., 0-level chip capping" technology, 0-level "thin film capping", 1-level packaging technology), the package characterization (RF, temperature stability, hermeticity) and the package evaluation (impact of the package on the device performance, towards meeting industrial specifications). As the potential and future for RF-MEMS is likely to be situated in the monolithic (SoC) and/or module (SiP) integration of RF-MEMS components, the impact, the constraints and the potential of the RF-MEMS packaging on the system integration will be studied as well. One of the expected outcomes of the project will be an "RF-MEMS packaging design guideline", that can effectively be used by industry for the development of RF-MEMS."