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FELICE · Ferroelectric Leaky Integration for Computational Efficiency
The rapid growth of AI demands efficient hardware solutions that enable real-time learning and decision-making in power-constrained edge applications, such as autonomous systems, medical diagnostics, and industrial monitoring. However, current AI hardware faces fundamental trade-offs between power consumption, processing efficiency, and accuracy, limiting its deployment at the edge. Traditional computing architectures separate memory and processing, leading to high energy costs associated with data movement, while existing neuromorphic and analog AI solutions often lack efficient on-chip learning capabilities. FELICE introduces a breakthrough approach to edge AI hardware by co-designing a novel computing architecture that integrates processing and memory within a single compact system. By leveraging ferroelectric leaky integrate-and-fire (FeLIF) neurons and FeFET-based non-volatile memory (NVM), FELICE enables efficient temporal information processing and real-time learning at significantly lower power and area requirements compared to conventional designs. This eliminates the need for external training, allowing AI models to adapt dynamically to changing conditions, a key advantage for edge applications operating in unpredictable environments. A core innovation of FELICE is its training methodology, which optimizes learning at different time scales, overcoming key limitations in temporal AI processing. Furthermore, the 28 nm technological node enhances energy efficiency, making FELICE a scalable and commercially viable solution. By integrating hardware and software co-optimization, FELICE extends the capabilities of current CMOS technology to enable energy-efficient AI deployment at the edge, offering a transformative step towards compact, adaptive, and real-time AI solutions in high-impact domains.
Consortium · 1 organisation
RIJKSUNIVERSITEIT GRONINGEN
NL · €150,000
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