ATHENIS · Automotive Tested High-voltage Embedded Non-volatile memory Integrated SoC

More than 20% of the value of each car already comes from embedded electronics. Keeping costs and space for additional functionality low requires further integration of electronic components such as low and high voltage devices and memory on a single System-on-Chip (SoC). SoC technologies for segments with lower reliability requirements are already available. However, there are no cost-effective technologies yet combining all of the harshest automotive reliability requirements for full SoC integration of powertrain ICs for engines, starters, alternators, etc. This barrier to powertrain IC SoC integration inhibits cost reduction and introduction of more fuel efficient cars. <br/>The purpose of ATHENIS is to provide proof of concept for the industry's first SoC technology platform that can surmount these integration barriers. The ATHENIS SoC technology platform is intended to be the first in meeting the combination of all of the harshest requirements including full reverse polarity capability at the low cost of CMOS, application voltages up to 120V, currents up to 10A, temperatures up to 200°C, embedded non-volatile memory, chip-level ESD up to =8kV HBM, and high logic gate densities. <br/>This will be achieved by combining HVCMOS technology from austriamicrosystems AG with MEMS-based Nanomech" embedded Non-Volatile Memory (eNVM) technology from Cavendish Kinetics. Innovative (patent pending) add-on technology modules such as reverse polarity HVCMOS and =8kV ESD structures for HVCMOS as well as automotive extensions for Nanomech will be developed. An alternator-like demonstrator with and without eNVM is selected for a worst case proof of concept. eNVM will enable "flexibility" to software-configure alternator systems for multiple car platforms. Valeo Electrical Systems will provide system specifications, system development and system evaluation. The other research partners contribute the required novel characterization, reliability, test, and simulation methodology."